"2010: Easier Statistical Timing Analysis", Ruben Molina Extreme DA

"Certess Joins Springsoft", Scott Sandler, Pres. Springsoft USA

	Russ Henke EDA Weekly Agilent EEsof EDA – Part I :After devoting the first three issues of EDA Weekly under this writer's byline to "The Role of Business …
Archived Weeklys

	Mark Gilbert Careers Corner Three cheers for 2010!!! Is there anyone not cheering the end of 2009? Fact is 2009 ended strong, and prospects for 2010 look even better…
Archived Carrers Corner

	Dr. Russ Henke EDA & IP Commentary EDA Industry Update December 2009 -- What did the Last Quarter Bring?
Archived Commentary

FPGA Floorplanning

MT-009: Data Converter Codes—Can You Decode Them?

MT-010: The Importance of Data Converter Static Specifications – Don't Lose Sight of the Basics!

 IP Search

Find detailed information about thousands of commercially available IP blocks from more than 230 suppliers.

A Register Transfer Level Approach to Memory Built-in Self Test and Repair Insertion, Atrenta This white paper describes a novel approach for memory built-in self test (MBIST) and repair insertion at the register transfer level (RTL). …

Modeling Parasitics in Sub-Micron IC Designs: Extract Them Before They Cost You a Re-Spin, Tanner EDA IC designers who work at the deep sub-micron level know that smaller process size means lower per-unit costs, higher performance, and lower power consumption, not an …

Management IntroductionCompany Presence Product Overview, Real Intent, Inc. Real Intent offers automatic verification solutions using innovative formaltechniques in an easy to use methodology, solving critical problems with …

ActiveDesign Presentation, Jasper Design Automation Jasper Design Automation, provider of the most advanced formal technology solutions available today, introduces ActiveDesign with Behavioral …

Real Intent Overview, Real Intent, Inc. DAC 2009 Celebrating Growth in Technology and Business